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Combined Threshold Implementation

Authors:
Jakob Feldtkeller
Jan Richter-Brockmann
Pascal Sasdrich
Tim Güneysu
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DOI: 10.46586/tches.v2024.i4.307-334
URL: https://tches.iacr.org/index.php/TCHES/article/view/11794
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Abstract: Physical security is an important aspect of devices for which an adversary can manipulate the physical execution environment. Recently, more and more attention has been directed towards a security model that combines the capabilities of passive and active physical attacks, i.e., an adversary that performs fault-injection and side-channel analysis at the same time. Implementing countermeasures against such a powerful adversary is not only costly but also requires the skillful combination of masking and redundancy to counteract all reciprocal effects.In this work, we propose a new methodology to generate combined-secure circuits. We show how to transform Threshold Implementation (TI)-like constructions to resist any adversary with the capability to tamper with internal gates and probe internal wires. For the resulting protection scheme, we can prove the combined security in a well-established theoretical security model.Since the transformation preserves the advantages of TI-like structures, the resulting circuits prove to be more efficient in the number of required bits of randomness (up to 100%), the latency in clock cycles (up to 40%), and even the area for pipelined designs (up to 40%) than the state of the art for an adversary restricted to manipulating a single gate and probing a single wire.
BibTeX
@article{tches-2024-34467,
  title={Combined Threshold Implementation},
  journal={IACR Transactions on Cryptographic Hardware and Embedded Systems},
  publisher={Ruhr-Universität Bochum},
  volume={2024},
  pages={307-334},
  url={https://tches.iacr.org/index.php/TCHES/article/view/11794},
  doi={10.46586/tches.v2024.i4.307-334},
  author={Jakob Feldtkeller and Jan Richter-Brockmann and Pascal Sasdrich and Tim Güneysu},
  year=2024
}